Initial commit with first design
This commit is contained in:
dbroqua
parent
79fbadb61c
commit
9c0419c6b6
5 changed files with 1010 additions and 0 deletions
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gh60_backlit.kicad_pcb
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gh60_backlit.kicad_pcb
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@ -0,0 +1,615 @@
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|||
(kicad_pcb (version 4) (host pcbnew 4.0.7+dfsg1-1)
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||||
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||||
(general
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||||
(links 29)
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||||
(no_connects 0)
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||||
(area 69.724999 99.724999 150.875001 114.875001)
|
||||
(thickness 1.6)
|
||||
(drawings 10)
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||||
(tracks 72)
|
||||
(zones 0)
|
||||
(modules 10)
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||||
(nets 7)
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||||
)
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||||
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||||
(page A4)
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||||
(layers
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||||
(0 F.Cu signal)
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||||
(31 B.Cu signal)
|
||||
(32 B.Adhes user)
|
||||
(33 F.Adhes user)
|
||||
(34 B.Paste user)
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||||
(35 F.Paste user)
|
||||
(36 B.SilkS user)
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||||
(37 F.SilkS user)
|
||||
(38 B.Mask user)
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||||
(39 F.Mask user)
|
||||
(40 Dwgs.User user)
|
||||
(41 Cmts.User user)
|
||||
(42 Eco1.User user)
|
||||
(43 Eco2.User user)
|
||||
(44 Edge.Cuts user)
|
||||
(45 Margin user)
|
||||
(46 B.CrtYd user)
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||||
(47 F.CrtYd user)
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||||
(48 B.Fab user)
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||||
(49 F.Fab user)
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||||
)
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||||
|
||||
(setup
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||||
(last_trace_width 0.25)
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||||
(trace_clearance 0.2)
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(zone_clearance 0.508)
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(zone_45_only no)
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(trace_min 0.2)
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||||
(segment_width 0.2)
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(edge_width 0.15)
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(via_size 0.6)
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||||
(via_drill 0.4)
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||||
(via_min_size 0.4)
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||||
(via_min_drill 0.3)
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||||
(uvia_size 0.3)
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||||
(uvia_drill 0.1)
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||||
(uvias_allowed no)
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||||
(uvia_min_size 0.2)
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||||
(uvia_min_drill 0.1)
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||||
(pcb_text_width 0.3)
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(pcb_text_size 1.5 1.5)
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(mod_edge_width 0.15)
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(mod_text_size 1 1)
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(mod_text_width 0.15)
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(pad_size 1.524 1.524)
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(pad_drill 0.762)
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||||
(pad_to_mask_clearance 0.2)
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(aux_axis_origin 0 0)
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(grid_origin 71.8 106.8)
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(visible_elements FFFFFF7F)
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(pcbplotparams
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(layerselection 0x00030_80000001)
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(usegerberextensions false)
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(excludeedgelayer true)
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(linewidth 0.100000)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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(useauxorigin false)
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(hpglpennumber 1)
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||||
(hpglpenspeed 20)
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||||
(hpglpendiameter 15)
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||||
(hpglpenoverlay 2)
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||||
(psnegative false)
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||||
(psa4output false)
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||||
(plotreference true)
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||||
(plotvalue true)
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||||
(plotinvisibletext false)
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||||
(padsonsilk false)
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||||
(subtractmaskfromsilk false)
|
||||
(outputformat 1)
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||||
(mirror false)
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||||
(drillshape 1)
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||||
(scaleselection 1)
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||||
(outputdirectory ""))
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||||
)
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||||
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||||
(net 0 "")
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||||
(net 1 LROW1)
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||||
(net 2 LCOL1)
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||||
(net 3 GND)
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||||
(net 4 VCC)
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||||
(net 5 GPIO2)
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||||
(net 6 "Net-(L1-Pad1)")
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||||
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||||
(net_class Default "This is the default net class."
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||||
(clearance 0.2)
|
||||
(trace_width 0.25)
|
||||
(via_dia 0.6)
|
||||
(via_drill 0.4)
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||||
(uvia_dia 0.3)
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||||
(uvia_drill 0.1)
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||||
(add_net GND)
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||||
(add_net GPIO2)
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||||
(add_net LCOL1)
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||||
(add_net LROW1)
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||||
(add_net "Net-(L1-Pad1)")
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||||
(add_net VCC)
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||||
)
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||||
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||||
(module Footprint:Inductor_Bourn_4mmx4mm (layer B.Cu) (tedit 56EAD789) (tstamp 59F0FC4D)
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||||
(at 139.6 103.6 180)
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||||
(path /59F0E354)
|
||||
(fp_text reference L1 (at 0.1778 -2.5654 180) (layer B.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
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||||
)
|
||||
(fp_text value 4.7uH (at 0 2.794 180) (layer Dwgs.User)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
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|
||||
(fp_line (start 2.4 -2) (end -2.4 -2) (layer B.SilkS) (width 0.15))
|
||||
(fp_line (start 2.4 2) (end 2.4 -2) (layer B.SilkS) (width 0.15))
|
||||
(fp_line (start -2.4 2) (end 2.4 2) (layer B.SilkS) (width 0.15))
|
||||
(pad 1 smd rect (at -1.525 0 180) (size 1.5 3.6) (layers B.Cu B.Paste B.Mask)
|
||||
(net 6 "Net-(L1-Pad1)"))
|
||||
(pad 2 smd rect (at 1.525 0 180) (size 1.5 3.6) (layers B.Cu B.Paste B.Mask)
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||||
(net 1 LROW1))
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||||
)
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||||
|
||||
(module Footprint:SOT-23-5 (layer B.Cu) (tedit 571FCFCA) (tstamp 59F0FC65)
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||||
(at 138.8 110.8 270)
|
||||
(descr "5-pin SOT23 package")
|
||||
(tags SOT-23-5)
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||||
(path /59F0E2DC)
|
||||
(attr smd)
|
||||
(fp_text reference U1 (at 2.5908 -1.2573 360) (layer B.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
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||||
)
|
||||
(fp_text value PAM2804 (at -0.05 -2.35 270) (layer B.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
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||||
)
|
||||
(fp_circle (center -0.3 1.7) (end -0.2 1.7) (layer B.SilkS) (width 0.15))
|
||||
(fp_line (start 0.25 1.45) (end -0.25 1.45) (layer B.SilkS) (width 0.15))
|
||||
(fp_line (start 0.25 -1.45) (end 0.25 1.45) (layer B.SilkS) (width 0.15))
|
||||
(fp_line (start -0.25 -1.45) (end 0.25 -1.45) (layer B.SilkS) (width 0.15))
|
||||
(fp_line (start -0.25 1.45) (end -0.25 -1.45) (layer B.SilkS) (width 0.15))
|
||||
(pad 1 smd rect (at -1.1 0.95 270) (size 1.06 0.65) (layers B.Cu B.Paste B.Mask)
|
||||
(net 5 GPIO2))
|
||||
(pad 2 smd rect (at -1.1 0 270) (size 1.06 0.65) (layers B.Cu B.Paste B.Mask)
|
||||
(net 3 GND))
|
||||
(pad 3 smd rect (at -1.1 -0.95 270) (size 1.06 0.65) (layers B.Cu B.Paste B.Mask)
|
||||
(net 6 "Net-(L1-Pad1)"))
|
||||
(pad 4 smd rect (at 1.1 -0.95 270) (size 1.06 0.65) (layers B.Cu B.Paste B.Mask)
|
||||
(net 4 VCC))
|
||||
(pad 5 smd rect (at 1.1 0.95 270) (size 1.06 0.65) (layers B.Cu B.Paste B.Mask)
|
||||
(net 2 LCOL1))
|
||||
(model TO_SOT_Packages_SMD.3dshapes/SOT-23-5.wrl
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||||
(at (xyz 0 0 0))
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||||
(scale (xyz 1 1 1))
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||||
(rotate (xyz 0 0 0))
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||||
)
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||||
)
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||||
|
||||
(module Footprint:5PIN_HEADER (layer F.Cu) (tedit 59F0F63C) (tstamp 59F10A7B)
|
||||
(at 71.8 106.8)
|
||||
(path /59F0F91D)
|
||||
(fp_text reference 5_PIN_HEADER0 (at 0 7.62) (layer F.SilkS) hide
|
||||
(effects (font (size 1 1) (thickness 0.25)))
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||||
)
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||||
(fp_text value 5_PIN_HEADER (at 0 -7.62) (layer F.Fab) hide
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||||
(effects (font (size 1 1) (thickness 0.25)))
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||||
)
|
||||
(pad 5 thru_hole circle (at 0 5.08) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
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||||
(net 1 LROW1))
|
||||
(pad 4 thru_hole circle (at 0 2.54) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
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||||
(net 1 LROW1))
|
||||
(pad 1 thru_hole circle (at 0 -5.08) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
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||||
(net 1 LROW1))
|
||||
(pad 2 thru_hole circle (at 0 -2.54) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
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||||
(net 1 LROW1))
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||||
(pad 3 thru_hole circle (at 0 0) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
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||||
(net 1 LROW1))
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||||
)
|
||||
|
||||
(module Footprint:5PIN_HEADER (layer F.Cu) (tedit 59F0F638) (tstamp 59F10A84)
|
||||
(at 90.85 106.8)
|
||||
(path /59F0F4BC)
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||||
(fp_text reference 5_PIN_HEADER1 (at 0 7.62) (layer F.SilkS) hide
|
||||
(effects (font (size 1 1) (thickness 0.25)))
|
||||
)
|
||||
(fp_text value 5_PIN_HEADER (at 0 -7.62) (layer F.Fab) hide
|
||||
(effects (font (size 1 1) (thickness 0.25)))
|
||||
)
|
||||
(pad 5 thru_hole circle (at 0 5.08) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
|
||||
(net 2 LCOL1))
|
||||
(pad 4 thru_hole circle (at 0 2.54) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
|
||||
(net 2 LCOL1))
|
||||
(pad 1 thru_hole circle (at 0 -5.08) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
|
||||
(net 2 LCOL1))
|
||||
(pad 2 thru_hole circle (at 0 -2.54) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
|
||||
(net 2 LCOL1))
|
||||
(pad 3 thru_hole circle (at 0 0) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
|
||||
(net 2 LCOL1))
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||||
)
|
||||
|
||||
(module Footprint:5PIN_HEADER (layer F.Cu) (tedit 59F0F630) (tstamp 59F10A8D)
|
||||
(at 109.9 106.8)
|
||||
(path /59F0F224)
|
||||
(fp_text reference 5_PIN_HEADER2 (at 0 7.62) (layer F.SilkS) hide
|
||||
(effects (font (size 1 1) (thickness 0.25)))
|
||||
)
|
||||
(fp_text value 5_PIN_HEADER (at 0 -7.62) (layer F.Fab) hide
|
||||
(effects (font (size 1 1) (thickness 0.25)))
|
||||
)
|
||||
(pad 5 thru_hole circle (at 0 5.08) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
|
||||
(net 2 LCOL1))
|
||||
(pad 4 thru_hole circle (at 0 2.54) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
|
||||
(net 2 LCOL1))
|
||||
(pad 1 thru_hole circle (at 0 -5.08) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
|
||||
(net 2 LCOL1))
|
||||
(pad 2 thru_hole circle (at 0 -2.54) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
|
||||
(net 2 LCOL1))
|
||||
(pad 3 thru_hole circle (at 0 0) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
|
||||
(net 2 LCOL1))
|
||||
)
|
||||
|
||||
(module Footprint:5PIN_HEADER (layer F.Cu) (tedit 59F0F60B) (tstamp 59F10A96)
|
||||
(at 128.95 106.8)
|
||||
(path /59F0EDCC)
|
||||
(fp_text reference 5_PIN_HEADER3 (at 0 7.62) (layer F.SilkS) hide
|
||||
(effects (font (size 1 1) (thickness 0.25)))
|
||||
)
|
||||
(fp_text value 5_PIN_HEADER (at 0 -7.62) (layer F.Fab) hide
|
||||
(effects (font (size 1 1) (thickness 0.25)))
|
||||
)
|
||||
(pad 5 thru_hole circle (at 0 5.08) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
|
||||
(net 2 LCOL1))
|
||||
(pad 4 thru_hole circle (at 0 2.54) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
|
||||
(net 2 LCOL1))
|
||||
(pad 1 thru_hole circle (at 0 -5.08) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
|
||||
(net 3 GND))
|
||||
(pad 2 thru_hole circle (at 0 -2.54) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
|
||||
(net 2 LCOL1))
|
||||
(pad 3 thru_hole circle (at 0 0) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
|
||||
(net 2 LCOL1))
|
||||
)
|
||||
|
||||
(module Footprint:5PIN_HEADER (layer F.Cu) (tedit 59F0F5FC) (tstamp 59F10A9F)
|
||||
(at 148 106.8)
|
||||
(path /59F0E9FC)
|
||||
(fp_text reference 5_PIN_HEADER4 (at 0 7.62) (layer F.SilkS) hide
|
||||
(effects (font (size 1 1) (thickness 0.25)))
|
||||
)
|
||||
(fp_text value 5_PIN_HEADER (at 0 -7.62) (layer F.Fab) hide
|
||||
(effects (font (size 1 1) (thickness 0.25)))
|
||||
)
|
||||
(pad 5 thru_hole circle (at 0 5.08) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask))
|
||||
(pad 4 thru_hole circle (at 0 2.54) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask))
|
||||
(pad 1 thru_hole circle (at 0 -5.08) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
|
||||
(net 4 VCC))
|
||||
(pad 2 thru_hole circle (at 0 -2.54) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
|
||||
(net 5 GPIO2))
|
||||
(pad 3 thru_hole circle (at 0 0) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask))
|
||||
)
|
||||
|
||||
(module Capacitors_SMD:C_0805_HandSoldering (layer B.Cu) (tedit 58AA84A8) (tstamp 59F11764)
|
||||
(at 144.3 107.8 90)
|
||||
(descr "Capacitor SMD 0805, hand soldering")
|
||||
(tags "capacitor 0805")
|
||||
(path /59F0E39F)
|
||||
(attr smd)
|
||||
(fp_text reference C1 (at 0 1.75 90) (layer B.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
|
||||
)
|
||||
(fp_text value 10uF (at 0 -1.75 90) (layer B.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
|
||||
)
|
||||
(fp_text user %R (at 0 1.75 90) (layer B.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
|
||||
)
|
||||
(fp_line (start -1 -0.62) (end -1 0.62) (layer B.Fab) (width 0.1))
|
||||
(fp_line (start 1 -0.62) (end -1 -0.62) (layer B.Fab) (width 0.1))
|
||||
(fp_line (start 1 0.62) (end 1 -0.62) (layer B.Fab) (width 0.1))
|
||||
(fp_line (start -1 0.62) (end 1 0.62) (layer B.Fab) (width 0.1))
|
||||
(fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.12))
|
||||
(fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.12))
|
||||
(fp_line (start -2.25 0.88) (end 2.25 0.88) (layer B.CrtYd) (width 0.05))
|
||||
(fp_line (start -2.25 0.88) (end -2.25 -0.87) (layer B.CrtYd) (width 0.05))
|
||||
(fp_line (start 2.25 -0.87) (end 2.25 0.88) (layer B.CrtYd) (width 0.05))
|
||||
(fp_line (start 2.25 -0.87) (end -2.25 -0.87) (layer B.CrtYd) (width 0.05))
|
||||
(pad 1 smd rect (at -1.25 0 90) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask)
|
||||
(net 4 VCC))
|
||||
(pad 2 smd rect (at 1.25 0 90) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask)
|
||||
(net 3 GND))
|
||||
(model Capacitors_SMD.3dshapes/C_0805.wrl
|
||||
(at (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
||||
|
||||
(module Capacitors_SMD:C_0805_HandSoldering (layer B.Cu) (tedit 58AA84A8) (tstamp 59F11769)
|
||||
(at 134.1 103.9 90)
|
||||
(descr "Capacitor SMD 0805, hand soldering")
|
||||
(tags "capacitor 0805")
|
||||
(path /59F0E3FF)
|
||||
(attr smd)
|
||||
(fp_text reference C2 (at 0 1.75 90) (layer B.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
|
||||
)
|
||||
(fp_text value 10uF (at 0 -1.75 90) (layer B.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
|
||||
)
|
||||
(fp_text user %R (at 0 1.75 90) (layer B.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
|
||||
)
|
||||
(fp_line (start -1 -0.62) (end -1 0.62) (layer B.Fab) (width 0.1))
|
||||
(fp_line (start 1 -0.62) (end -1 -0.62) (layer B.Fab) (width 0.1))
|
||||
(fp_line (start 1 0.62) (end 1 -0.62) (layer B.Fab) (width 0.1))
|
||||
(fp_line (start -1 0.62) (end 1 0.62) (layer B.Fab) (width 0.1))
|
||||
(fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.12))
|
||||
(fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.12))
|
||||
(fp_line (start -2.25 0.88) (end 2.25 0.88) (layer B.CrtYd) (width 0.05))
|
||||
(fp_line (start -2.25 0.88) (end -2.25 -0.87) (layer B.CrtYd) (width 0.05))
|
||||
(fp_line (start 2.25 -0.87) (end 2.25 0.88) (layer B.CrtYd) (width 0.05))
|
||||
(fp_line (start 2.25 -0.87) (end -2.25 -0.87) (layer B.CrtYd) (width 0.05))
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||||
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32
gh60_backlit.pro
Normal file
32
gh60_backlit.pro
Normal file
|
|
@ -0,0 +1,32 @@
|
|||
update=Wed 25 Oct 2017 09:15:25 PM CEST
|
||||
version=1
|
||||
last_client=kicad
|
||||
[pcbnew]
|
||||
version=1
|
||||
LastNetListRead=
|
||||
UseCmpFile=1
|
||||
PadDrill=0.600000000000
|
||||
PadDrillOvalY=0.600000000000
|
||||
PadSizeH=1.500000000000
|
||||
PadSizeV=1.500000000000
|
||||
PcbTextSizeV=1.500000000000
|
||||
PcbTextSizeH=1.500000000000
|
||||
PcbTextThickness=0.300000000000
|
||||
ModuleTextSizeV=1.000000000000
|
||||
ModuleTextSizeH=1.000000000000
|
||||
ModuleTextSizeThickness=0.150000000000
|
||||
SolderMaskClearance=0.000000000000
|
||||
SolderMaskMinWidth=0.000000000000
|
||||
DrawSegmentWidth=0.200000000000
|
||||
BoardOutlineThickness=0.100000000000
|
||||
ModuleOutlineThickness=0.150000000000
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[general]
|
||||
version=1
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
LibName1=/home/dbroqua/Projects/dbroqua/kicad_parts/kicad_parts
|
||||
363
gh60_backlit.sch
Normal file
363
gh60_backlit.sch
Normal file
|
|
@ -0,0 +1,363 @@
|
|||
EESchema Schematic File Version 2
|
||||
LIBS:kicad_parts
|
||||
LIBS:gh60_backlit-cache
|
||||
EELAYER 25 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 1 1
|
||||
Title ""
|
||||
Date ""
|
||||
Rev ""
|
||||
Comp ""
|
||||
Comment1 ""
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
$Comp
|
||||
L PAM2804 U1
|
||||
U 1 1 59F0E2DC
|
||||
P 3500 2000
|
||||
F 0 "U1" H 3350 2200 60 0000 C CNN
|
||||
F 1 "PAM2804" H 3500 1800 60 0000 C CNN
|
||||
F 2 "Footprint:SOT-23-5" H 3500 2050 60 0001 C CNN
|
||||
F 3 "" H 3500 2050 60 0000 C CNN
|
||||
1 3500 2000
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L INDUCTOR L1
|
||||
U 1 1 59F0E354
|
||||
P 4200 1900
|
||||
F 0 "L1" V 4150 1900 40 0000 C CNN
|
||||
F 1 "4.7uH" V 4300 1900 40 0000 C CNN
|
||||
F 2 "Footprint:Inductor_Bourn_4mmx4mm" H 4200 1900 60 0001 C CNN
|
||||
F 3 "" H 4200 1900 60 0000 C CNN
|
||||
1 4200 1900
|
||||
0 -1 -1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L C C1
|
||||
U 1 1 59F0E39F
|
||||
P 2750 2050
|
||||
F 0 "C1" H 2775 2150 50 0000 L CNN
|
||||
F 1 "10uF" H 2775 1950 50 0000 L CNN
|
||||
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 2788 1900 50 0001 C CNN
|
||||
F 3 "" H 2750 2050 50 0001 C CNN
|
||||
1 2750 2050
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L C C2
|
||||
U 1 1 59F0E3FF
|
||||
P 5100 2250
|
||||
F 0 "C2" H 5125 2350 50 0000 L CNN
|
||||
F 1 "10uF" H 5125 2150 50 0000 L CNN
|
||||
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 5138 2100 50 0001 C CNN
|
||||
F 3 "" H 5100 2250 50 0001 C CNN
|
||||
1 5100 2250
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L R R1
|
||||
U 1 1 59F0E43C
|
||||
P 3900 3950
|
||||
F 0 "R1" V 3980 3950 50 0000 C CNN
|
||||
F 1 "R" V 3900 3950 50 0000 C CNN
|
||||
F 2 "Resistors_SMD:R_0805_HandSoldering" V 3830 3950 50 0001 C CNN
|
||||
F 3 "" H 3900 3950 50 0001 C CNN
|
||||
1 3900 3950
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L 5_PIN_HEADER 5_PIN_HEADER4
|
||||
U 1 1 59F0E9FC
|
||||
P 1000 850
|
||||
F 0 "5_PIN_HEADER4" H 1000 1000 60 0000 C CNN
|
||||
F 1 "5_PIN_HEADER" H 1000 350 60 0000 C CNN
|
||||
F 2 "Footprint:5PIN_HEADER" H 1000 850 60 0001 C CNN
|
||||
F 3 "" H 1000 850 60 0000 C CNN
|
||||
1 1000 850
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L 5_PIN_HEADER 5_PIN_HEADER3
|
||||
U 1 1 59F0EDCC
|
||||
P 1000 1650
|
||||
F 0 "5_PIN_HEADER3" H 1000 1800 60 0000 C CNN
|
||||
F 1 "5_PIN_HEADER" H 1000 1150 60 0000 C CNN
|
||||
F 2 "Footprint:5PIN_HEADER" H 1000 1650 60 0001 C CNN
|
||||
F 3 "" H 1000 1650 60 0000 C CNN
|
||||
1 1000 1650
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Text GLabel 1550 850 2 60 Input ~ 0
|
||||
VCC
|
||||
Wire Wire Line
|
||||
1550 850 1000 850
|
||||
Text GLabel 1550 950 2 60 Input ~ 0
|
||||
GPIO2
|
||||
Text GLabel 1550 1050 2 60 Input ~ 0
|
||||
GPIO1
|
||||
Text GLabel 1550 1150 2 60 Input ~ 0
|
||||
GPIO3
|
||||
Text GLabel 1550 1250 2 60 Input ~ 0
|
||||
GPIO0
|
||||
Wire Wire Line
|
||||
1550 950 1000 950
|
||||
Wire Wire Line
|
||||
1550 1050 1000 1050
|
||||
Wire Wire Line
|
||||
1550 1150 1000 1150
|
||||
Wire Wire Line
|
||||
1550 1250 1000 1250
|
||||
Text GLabel 1550 1650 2 60 Input ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
1550 1650 1000 1650
|
||||
Text GLabel 1550 1750 2 60 Input ~ 0
|
||||
LCOL14
|
||||
Text GLabel 1550 1850 2 60 Input ~ 0
|
||||
LCOL12
|
||||
Text GLabel 1550 1950 2 60 Input ~ 0
|
||||
LCOL13
|
||||
Text GLabel 1550 2050 2 60 Input ~ 0
|
||||
LCOL11
|
||||
$Comp
|
||||
L 5_PIN_HEADER 5_PIN_HEADER2
|
||||
U 1 1 59F0F224
|
||||
P 1000 2450
|
||||
F 0 "5_PIN_HEADER2" H 1000 2600 60 0000 C CNN
|
||||
F 1 "5_PIN_HEADER" H 1000 1950 60 0000 C CNN
|
||||
F 2 "Footprint:5PIN_HEADER" H 1000 2450 60 0001 C CNN
|
||||
F 3 "" H 1000 2450 60 0000 C CNN
|
||||
1 1000 2450
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
1000 1750 1550 1750
|
||||
Wire Wire Line
|
||||
1000 1850 1550 1850
|
||||
Wire Wire Line
|
||||
1000 1950 1550 1950
|
||||
Wire Wire Line
|
||||
1000 2050 1550 2050
|
||||
Text GLabel 1550 2450 2 60 Input ~ 0
|
||||
LCOL8
|
||||
Text GLabel 1550 2550 2 60 Input ~ 0
|
||||
LCOL9
|
||||
Text GLabel 1550 2650 2 60 Input ~ 0
|
||||
LCOL10
|
||||
Text GLabel 1550 2750 2 60 Input ~ 0
|
||||
LCOL7
|
||||
Text GLabel 1550 2850 2 60 Input ~ 0
|
||||
LCOL6
|
||||
Wire Wire Line
|
||||
1000 2450 1550 2450
|
||||
Wire Wire Line
|
||||
1550 2550 1000 2550
|
||||
Wire Wire Line
|
||||
1000 2650 1550 2650
|
||||
Wire Wire Line
|
||||
1550 2750 1000 2750
|
||||
Wire Wire Line
|
||||
1000 2850 1550 2850
|
||||
$Comp
|
||||
L 5_PIN_HEADER 5_PIN_HEADER1
|
||||
U 1 1 59F0F4BC
|
||||
P 1000 3250
|
||||
F 0 "5_PIN_HEADER1" H 1000 3400 60 0000 C CNN
|
||||
F 1 "5_PIN_HEADER" H 1000 2750 60 0000 C CNN
|
||||
F 2 "Footprint:5PIN_HEADER" H 1000 3250 60 0001 C CNN
|
||||
F 3 "" H 1000 3250 60 0000 C CNN
|
||||
1 1000 3250
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Text GLabel 1550 3250 2 60 Input ~ 0
|
||||
LCOL1
|
||||
Wire Wire Line
|
||||
1000 3250 1550 3250
|
||||
Text GLabel 1550 3350 2 60 Input ~ 0
|
||||
LCOL3
|
||||
Text GLabel 1550 3450 2 60 Input ~ 0
|
||||
LCOL5
|
||||
Text GLabel 1550 3550 2 60 Input ~ 0
|
||||
LCOL2
|
||||
Text GLabel 1550 3650 2 60 Input ~ 0
|
||||
LCOL4
|
||||
Wire Wire Line
|
||||
1000 3650 1550 3650
|
||||
Wire Wire Line
|
||||
1550 3550 1000 3550
|
||||
Wire Wire Line
|
||||
1000 3450 1550 3450
|
||||
Wire Wire Line
|
||||
1550 3350 1000 3350
|
||||
$Comp
|
||||
L 5_PIN_HEADER 5_PIN_HEADER0
|
||||
U 1 1 59F0F91D
|
||||
P 1000 4050
|
||||
F 0 "5_PIN_HEADER0" H 1000 4200 60 0000 C CNN
|
||||
F 1 "5_PIN_HEADER" H 1000 3550 60 0000 C CNN
|
||||
F 2 "Footprint:5PIN_HEADER" H 1000 4050 60 0001 C CNN
|
||||
F 3 "" H 1000 4050 60 0000 C CNN
|
||||
1 1000 4050
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Text GLabel 1550 4050 2 60 Input ~ 0
|
||||
LROW1
|
||||
Wire Wire Line
|
||||
1550 4050 1000 4050
|
||||
Text GLabel 1550 4150 2 60 Input ~ 0
|
||||
LROW4
|
||||
Text GLabel 1550 4250 2 60 Input ~ 0
|
||||
LROW3
|
||||
Text GLabel 1550 4350 2 60 Input ~ 0
|
||||
LROW2
|
||||
Text GLabel 1550 4450 2 60 Input ~ 0
|
||||
LROW5
|
||||
Wire Wire Line
|
||||
1550 4450 1000 4450
|
||||
Wire Wire Line
|
||||
1000 4350 1550 4350
|
||||
Wire Wire Line
|
||||
1000 4250 1550 4250
|
||||
Wire Wire Line
|
||||
1550 4150 1000 4150
|
||||
Text GLabel 2550 1900 0 60 Input ~ 0
|
||||
VCC
|
||||
Wire Wire Line
|
||||
2550 1900 3100 1900
|
||||
Connection ~ 2750 1900
|
||||
Text GLabel 2550 2200 0 60 Input ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
2550 2200 3000 2200
|
||||
Wire Wire Line
|
||||
3000 2200 3000 2000
|
||||
Wire Wire Line
|
||||
3000 2000 3100 2000
|
||||
Connection ~ 2750 2200
|
||||
Text GLabel 2550 2400 0 60 Input ~ 0
|
||||
GPIO2
|
||||
Wire Wire Line
|
||||
2550 2400 3100 2400
|
||||
Wire Wire Line
|
||||
3100 2400 3100 2100
|
||||
Wire Wire Line
|
||||
4500 1900 5100 1900
|
||||
Wire Wire Line
|
||||
5100 1900 5100 2100
|
||||
Text GLabel 5450 2600 2 60 Input ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
5100 2400 5100 2600
|
||||
Wire Wire Line
|
||||
5100 2600 5450 2600
|
||||
Wire Wire Line
|
||||
4700 1900 4700 2800
|
||||
Connection ~ 4700 1900
|
||||
Text GLabel 4600 2200 0 60 Input ~ 0
|
||||
LROW1
|
||||
Text GLabel 4600 2350 0 60 Input ~ 0
|
||||
LROW2
|
||||
Text GLabel 4600 2500 0 60 Input ~ 0
|
||||
LROW3
|
||||
Text GLabel 4600 2650 0 60 Input ~ 0
|
||||
LROW4
|
||||
Text GLabel 4600 2800 0 60 Input ~ 0
|
||||
LROW5
|
||||
Wire Wire Line
|
||||
4700 2800 4600 2800
|
||||
Wire Wire Line
|
||||
4600 2650 4700 2650
|
||||
Connection ~ 4700 2650
|
||||
Wire Wire Line
|
||||
4600 2500 4700 2500
|
||||
Connection ~ 4700 2500
|
||||
Wire Wire Line
|
||||
4600 2350 4700 2350
|
||||
Connection ~ 4700 2350
|
||||
Wire Wire Line
|
||||
4600 2200 4700 2200
|
||||
Connection ~ 4700 2200
|
||||
Text GLabel 4200 4200 2 60 Input ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
3900 4200 4200 4200
|
||||
Text GLabel 3800 2400 0 60 Input ~ 0
|
||||
LCOL1
|
||||
Wire Wire Line
|
||||
3800 2400 3900 2400
|
||||
Connection ~ 3900 2400
|
||||
Text GLabel 3800 2500 0 60 Input ~ 0
|
||||
LCOL2
|
||||
Text GLabel 3800 2600 0 60 Input ~ 0
|
||||
LCOL3
|
||||
Text GLabel 3800 2700 0 60 Input ~ 0
|
||||
LCOL4
|
||||
Text GLabel 3800 2800 0 60 Input ~ 0
|
||||
LCOL5
|
||||
Text GLabel 3800 2900 0 60 Input ~ 0
|
||||
LCOL6
|
||||
Text GLabel 3800 3000 0 60 Input ~ 0
|
||||
LCOL7
|
||||
Text GLabel 3800 3100 0 60 Input ~ 0
|
||||
LCOL8
|
||||
Text GLabel 3800 3200 0 60 Input ~ 0
|
||||
LCOL9
|
||||
Text GLabel 3800 3300 0 60 Input ~ 0
|
||||
LCOL10
|
||||
Text GLabel 3800 3400 0 60 Input ~ 0
|
||||
LCOL11
|
||||
Text GLabel 3800 3500 0 60 Input ~ 0
|
||||
LCOL12
|
||||
Text GLabel 3800 3600 0 60 Input ~ 0
|
||||
LCOL13
|
||||
Text GLabel 3800 3700 0 60 Input ~ 0
|
||||
LCOL14
|
||||
Wire Wire Line
|
||||
3800 2500 3900 2500
|
||||
Connection ~ 3900 2500
|
||||
Wire Wire Line
|
||||
3800 2600 3900 2600
|
||||
Connection ~ 3900 2600
|
||||
Wire Wire Line
|
||||
3800 2700 3900 2700
|
||||
Connection ~ 3900 2700
|
||||
Wire Wire Line
|
||||
3800 2800 3900 2800
|
||||
Connection ~ 3900 2800
|
||||
Wire Wire Line
|
||||
3800 2900 3900 2900
|
||||
Connection ~ 3900 2900
|
||||
Wire Wire Line
|
||||
3800 3000 3900 3000
|
||||
Connection ~ 3900 3000
|
||||
Wire Wire Line
|
||||
3800 3100 3900 3100
|
||||
Connection ~ 3900 3100
|
||||
Wire Wire Line
|
||||
3800 3200 3900 3200
|
||||
Connection ~ 3900 3200
|
||||
Wire Wire Line
|
||||
3800 3300 3900 3300
|
||||
Connection ~ 3900 3300
|
||||
Wire Wire Line
|
||||
3800 3400 3900 3400
|
||||
Connection ~ 3900 3400
|
||||
Wire Wire Line
|
||||
3800 3500 3900 3500
|
||||
Connection ~ 3900 3500
|
||||
Wire Wire Line
|
||||
3800 3600 3900 3600
|
||||
Connection ~ 3900 3600
|
||||
Wire Wire Line
|
||||
3800 3700 3900 3700
|
||||
Connection ~ 3900 3700
|
||||
Wire Wire Line
|
||||
3900 3800 3900 2100
|
||||
Wire Wire Line
|
||||
3900 4100 3900 4200
|
||||
$EndSCHEMATC
|
||||
Loading…
Reference in a new issue